Special Manpower Development Program for Chip to System Design

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Special Manpower Development Programme (SMDP) is initiated by Ministry of Communication & Information Technology, Government of India with a vision to make India, a significant player in VLSI Design and related software.

During the 9th Plan, DeitY aimed to increase India’s share of global VLSI Design market from 0.5% to 5%. Recognising the fact that availability of quality human resource will be a key catalyst for achieving this target, DeitY started the “Special Manpower Development Programme in VLSI design and related software (SMDP- Phase-I)” in 1998 involving 19 academic and research institutions categorised into Resource Centres (7 in number - 5 IITs, IISc, CEERI) and Participating Institutes (12 in number). This resulted in generating about 9300 trained personnel with hands-on experience in VLSI designing and related areas.

The Phase II of the Special Manpower Development Programme in VLSI design and related software (SMDP II) was initiated in 2005 during the 10th Plan as a continuation of Phase-I with the aim to increase the global VLSI Design market share to around 15% by 2010.

The Phase II of the SMDP project brought additional participating institutions under its purview making 32 as the total number of implementing organisations that includes 25 Participating Institutions (NITs and few others) with the mentorship of 7 Resource Centers (mainly IITs, IISc and CEERI). Under SMDP-II, 23 Instruction Enhancement Programmes and four workshops involving International Guest Faculty were conducted to train the faculty of participating institutions on various topics. SMDP-II also resulted in design and fabrication of 42 designs/ASICs coming out of 14 Multi-Project-Wafer (MPW) runs which included both digital and analog ICs.

After the completion of SMDP Phase-II, an integrated program entitled “Special Manpower Development Program for Chips to System” has been initiated which not only aims on developing specialized manpower in VLSI but also emphasizes on development of working prototypes of System on Chip / System using ASICs / ICs designed in the program.

This is a step towards bringing a System on Chip and System development culture in academic institutions in the country. This phase aims at broadening the VLSI Design & quality research base (through ‘Networked PhD’ Program) in the country and also take up new & distinctive initiatives which will ensure moving up in the value chain in System on Chip / system Development using mostly in-house designed ASICs / ICs.

In the Phase –III SMDP-C2SD, there are 17 new Participating Institutions. The implementation structure of SMDP-C2SD is similar to SMDP Phase II project where Participating Institutions (PIs) will be associated with one of the Resource Centers (RCs). The following RC-PI cluster has been finalized for SMDP-C2SD.


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